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Job Category : System Validation Engineer
Location : Hyderabad
Salary : 15 - 30 Lakh/Year
JOB TITLE:
REPORTS TO:
System validation manager
STATUS:
Full Time
Summary:
The System Validation Engineer will work on a complex multidisciplinary system consisting of HW,SW,ASIC,ALGO,and RF.The day to day will include all validation aspects of system requirements and integration with H.W,SW and FPGA teams..
Duties and Responsibilities:
Test planning and execution verifying requirements are implemented correctly.Be a focal point for validation and integration activity
. Minimum Qualifications:·
Bachelor’s degree in electronic, Computer Engineering or related discipline· Experience 3-9 years at system validation/Integration testing on multidisciplinary systems focusing on digital aspects preferred from Telecom industry.· Knowledge of system validation process, automation techniques and testing methodologies· High debug capabilities when work with the Software, systems,FPGA and HW teams on complex issues.· Team player with Great interpersonal and communication skills· Autodidact· Ability to move fast and decisiveness.
Preferred Qualifications:·
Experience working with FPGA,ASIC,RT.· Experience in RF and LTE,5G,CPRI,ORANExperience working with test equipment such as SPECTRUM, SIGNAL GENERATOR etc.
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